%%
%% This is file `ciwidko.mf',
%% generated with the docstrip utility.
%%
%% The original source files were:
%%
%% circ.dtx  (with options: `csywidko')
%% Copyright 1997-98  Sebastian Tannert / Andreas Tille
%% 
%% This file is part of the CIRC package
%% -------------------------------------
%%   This package is distributed in the hope that it will be useful,
%%   but WITHOUT ANY WARRANTY; without even the implied warranty of
%%   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
%% 
%%   For error reports concerning UNCHANGED versions of this file no
%%   more than one year old, see CIRC.DVI.
%% 
%% IMPORTANT COPYRIGHT NOTICE:
%% 
%% You are NOT ALLOWED to distribute this file alone.
%% 
%% You are allowed to distribute this file under the condition that it
%% is distributed together with all the files listed in circ.txt.
%% 
%% If you receive only some of these files from someone, complain!
%% 
%% You are NOT ALLOWED to change this file.
input csym;
designsize:=.5lLE#;

def resistor =
  numeric pl;
  pl:=.5(res_lt-res_wd);
  z0=(0,0);
  z1=z0+(pl,0);
  z2=z1+(res_wd,0);
  z3=z2+(pl,0);
  z4-z5=z6-z7=(0,res_ht);
  z1=.5[z4,z5];
  z2=.5[z6,z7];
  z8=z0+(res_x,-res_y);
  pickup pensquare scaled normalline;
  draw z0--z1;
  draw z2--z3;
  draw z4--z6--z7--z5--cycle;
enddef;

def resistor_var =
  {{
  addxTF(shifted -z8 rotated -90);
  resistor;
  pickup pensquare scaled normalline;
  arrow(z8,res_ara,0,res_phi,arr_lt,arr_phi)
    (pickup pencircle scaled normalline);
  }}
enddef;

def capacitor =
  pickup pensquare scaled normalline;
  numeric pl;
  pl:=.5(cap_lt-cap_spc);
  z0=(0,0);
  z1=z0+(pl,0);
  z2=z1+(cap_spc,0);
  z3=z2+(pl,0);
  z4-z5=z6-z7=(0,cap_ht);
  z1=.5[z4,z5];
  z2=.5[z6,z7];
  draw z0--z1;
  draw z2--z3;
  draw z4--z5;
  draw z6--z7;
enddef;

def capacitor_var =
  capacitor;
  noarrowTF;
  pickup pencircle scaled thinline;
  arrow(.5[z1,z2],cap_ara,cap_arb,cap_phi,arr_lt,arr_phi)();
enddef;

def electrolytic_capacitor =
  pickup pensquare scaled normalline;
  numeric pl;
  pl:=.5(cap_lt-cap_spc-cap_wd);
  z0=(0,0);
  z1=z0+(pl,0);
  z2=z1+(cap_spc,0);
  z3=z2+(cap_wd,0);
  z4=z3+(pl,0);
  z5-z6=z7-z8=z9-z10=(0,cap_ht);
  z1=.5[z5,z6];
  z2=.5[z7,z8];
  z3=.5[z9,z10];
  draw z0--z1;
  draw z3--z4;
  draw z5--z6;
  draw z7--z9--z10--z8--cycle;
enddef;

"Widerstand";
twochars(0)(resistor)(.5res_ht#,res_lt#,.5res_ht#);

"Widerstand variabel";
eightchars(8)(resistor_var)(res_y#,res_lt#-res_x#,res_x#,res_o#);

"Kondensator";
twochars(128)(capacitor)(.5cap_ht#,cap_lt#,.5cap_ht#);

"Kondensator variabel";
twochars(130)(capacitor_var)(.5cap_ht#,cap_lt#,.5cap_ht#);

"Elektrolyt-Kondensator";
fourchars(136)(electrolytic_capacitor)(z4)(.5cap_ht#,cap_lt#,.5cap_ht#);

end;
%% 
%%
%% End of file `ciwidko.mf'.
